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CPLDs for your Commodore
Ever since Jeri Ellsworth showed off her early
prototype of a new Commodore, the community has been a buzz with
acronyms such as FPGA, CPLD, VHDL, and so on. Fascinated to know
what it all meant I dug a little deeper…
Great project ideas, but…
If you’re like me you’ll have dozens of ideas for great Commodore
projects, but how them many actually see the light of day? Most
often by the time you sketch it all out your project will take up
a dozen or more chips. Wow… who’s going to build that you ask. I
normally won’t even try to build any with more than 3 to 6 chips,
and I really prefer “one-chip” projects. Also, the chance of a simple
soldering error giving you hours of grief is just not worth it.
And even if you do get it right first time, what about upgrades?
This is where a new breed of electronics comes into its own; programmable
logic.
The basics…
Okay… time to explain all those acronyms. Programmable logic is
just that, logic which is programmable. Computers all work with
logic, the fundamental building blocks including gates (AND, OR,
NOT), flip-flops, latches, buffers, counters and such like. These
building blocks get interconnected to form larger structures such
as CPUs, memories and controllers. Normally the interconnections
are permanent; wires or traces. With programmable logic, the interconnections
are re-configurable. The building blocks can be configured one way,
then re-programmed into a completely different configuration. It
is this re-programmability that allows the hardware design to be
upgraded in the same way software can.
Programmable logic comes in various flavours depending upon
the scale and flexibility of the part, and the specific manufacturer
who makes the parts. Ignoring the older and most simplest of programmable
parts, today we are left with essentially two classes of parts:
CPLD – Complex Programmable Logic Devices, and FPGA – Field Programmable
Gate Arrays. They generally differ in two significant ways:
- FPGAs contain significantly more logic elements than CPLDs;
extending the possibilities of what you can design…
- FPGAs do not remember their configuration and need to be re-programmed
each time they are powered up; meaning you need to have a memory
device attached adding to complexity of the project…
Both technologies are programmed using a software language,
know as a Hardware Definition Language (HDL) of which VHDL is
a particular type. Some devices can be programmed by simply drawing
the circuit’s schematic.
The other challenges that face the Commodore hobbyist are:
- Chip packaging and pin count: most chips made today
do not come in convenient packaging if your only way to build
things is by point-to-point soldering. Your best bet is to stick
with PLCC devices as they can be socketed and the pin spacing
on the sockets is respectable.
- Voltage: unfortunately most modern devices are designed
to operate at lower voltages than what is available on the Commodore.
This is not really a problem for powering the chips, but is
more so for interfacing to the I/O pins. The best choice is
3.3V technology that is 5V input tolerant. What this means is
that the chips can be directly connected to the Commodore’s
input /output lines, but you will have to provide either a regulator
or battery pack for powering the CPLD. There are some 5V products
still available, but they are generally older designs and as
such slightly more expensive
The CPLD route…
After considering both options, I chose the CPLD route - primarily
as it allowed for “one chip projects”. Sure, FPGAs would allow me
to experiment with bigger and better designs, but the need for an
EPROM, FLASH or SPROM to program the chip would just add to the
complexity and cost of the projects.
Today’s CPLDs contain EEPROM memory internally meaning that
they can remember their configuration even when the power is turned
off. The trade-off is that because they contain their own memory,
there is less room available for customisable logic.
The customisable logic comes in the form of a basic element
called a macrocell. Essentially a macrocell can be considered
as one flip-flop (or “bit” of data) with associated input /output.
The I/O can be connected to almost any pin on the chip. A CPLD
chip can contain anywhere from 32 to 512 macrocells, so at best
case 32 to 512 bits of information. Not much, you say? Indeed,
its not going to store your latest photo or document… but nor
is it meant to. A CPLD is meant to be used as a logic device,
for example as a specialised IO chip, or custom CPU. Consider
Commodore’s CIA; it has sixteen 8-bit registers, or about logic
128bits.
A Practical Introduction…
So you want to get started. Well, this is not as easy as it may
seem. There are many choices to make. Which manufacturer’s chips
to use? Do you buy the chips or do you get a kit? What about a programming
cable? How big a chip should you try? And so on… I was overwhelmed
when first confronting the choice, not that the choices were complex,
but rather that there are so many options to choose, each with its
merits. In the end I decided upon the following, and I feel it provided
the best balance with respect to getting started with CPLDs:
Xilinx CPLD Chips (www.xilinx.com):
- CPLDs were enough for the sort of projects I was likely to
tackle in the beginning
- CoolRunner XPLA3 CPLDs are a new design, important in an industry
which discontinues production every few years
- The XCR3032/3064 chips come in a “PLCC” package, important
if you are having to point-to-point solder your designs and
want to use sockets. The PLCC44 package offers up to 36 customisable
I/O pins
- On-line shop for purchasing chips; piece price is only a few
dollars for the above chips. Larger chip designs in the family
are also available and are quite affordable
- Free design and programming software, and it includes a schematic
entry, analysis and capture tool. The software can be downloaded
from the website, or you may get a CD mailed to you by one of
the distributors
Digilent Development Kit (www.digilentinc.com):
- These guys make a great CPLD board (XCR or XCRP) that includes
the programming interface (allowing you to program the chip)
and also includes a range of I/O functions such as buttons and
LEDs so that you can experiment when learning the basics
- The XCR(P) board is one of the cheapest development kits on
the market, and Digilent supply many educational institutions.
- If you ask nicely they may throw in one of their tutorial
CDROMs that I found was a great introduction to working with
the Xilinx software. The only step that wasn’t adequately covered
on my CD was the pin-assignment step, but this may have been
updated by now.
Your first project…
Within a few hours of getting your kit and/or parts together you’ll
be ready to go with your first project. So where do you start?
If you bought a development kit, I’d recommend trialling a few
example designs with it to go over the software basics and get
a handle for how things need to be done.
The Xilinx Webpack software is great, but does have a couple
of quirks that need some trial and error practice. Have a play
with both the schematic and VHDL options. I have found that
the schematic method works easiest for me… but backup your project
regularly as I have found that sometimes you cannot undo some
of the changes.
When you are ready for your first standalone project I’d suggest
you chose something simple and build it “both” ways, using conventional
TTL and CPLD parts, just to demonstrate to yourself that you
haven’t got the design wrong. For my first project I built the
256kB memory expansion project described in Transactor
Volume 9, Issue 2. The photos demonstrate how the two constructions
compare. It should be realised that the XCR3064 CPLD is only
about one-fifth utilised, meaning that a lot more logic can
be implemented without increases to its size whilst the design
built in conventional TTL chips would be 5 times bigger, and
probably 5x5 more difficult to wire up.
| The TTL Way: |
The CPLD Way: |
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Some useful links CPLD related
info:
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